
1-2 Using the LSIU80ALVD
1.2 Features
This section provides a high level overview of the PCI Interface, the SCSI
Interface, and Board Characteristics for the LSIU80ALVD.
1.2.1 PCI Interface
• Full 32-bit DMA bus master
• Zero wait-state bus master data bursts up to 133 Mbytes/s
(@ 33 MHz)
• Universal 3.3 V and 5 V PCI bus voltage support
• Supports 32-bit 33 MHz data bursts with variable burst lengths
• Bursts 2 to 128 dwords across the PCI bus
• Prefetches up to 8 Dwords of SCRIPTs instructions
• Supports PCI Write and Invalidate, Read Line, and Read Multiple
commands
1.2.2 SCSI Interface
• Supports 16-bit LVD and SE signaling
• Includes 4 Kbytes RAM for SCRIPTs instruction storage
• Automatically enables LVD or SE termination
• Contains external 68-pin high density (HD) and internal 68-pin HD
latching connectors
• Performs wide Ultra2 SCSI LVD synchronous transfers up to
80 Mbytes/s
• SCSI synchronous offset up to 31
• Provides SCSI termination power (TERMPWR) source with
autoresetting circuit protection device
• SCSI Configured AutoMatically (SCAM) Level 1 Capability
(Set “OFF” by default)
• Flash ROM for BIOS storage for up to 256 Kbytes
• Supports variable block size and scatter/gather data transfers
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